GitHub

adder-circuits

Implementation of digital logic circuits for EOC Assignment 4 using HDL-style modules, based on the Nand2Tetris curriculum. Includes gates, multiplexers, demultiplexers, and adders.
IEEE

Design of Low Power 4-Bit Adder for DSP Applications Using Custom 45nm Technology CMOS Standard Cell Design

Abstract: The increasing demand for energy-efficient digital circuits in resource-constrained environments like mobile devices has driven the need for optimized low-power designs. This research ...
GitHub

half-adder

This repository contains Verilog HDL implementations of Half Adders, Full Adders, and 4-bit Adders, designed at three different abstraction levels: Gate Level, Dataflow Level, and Behavioral Level.
Geeky Gadgets

How to use Circuit Canvas to draw and illustrate wiring diagrams

Ever found yourself tangled in a mess of wires and components, struggling to create a clear and intuitive wiring diagram? If so, you’re not alone. Many electronics enthusiasts face this challenge, ...
IEEE

Simulation-Based Analysis of Power, Hardware, and Temperature Constraints in 4-Bit Full Adder Circuits for High-Speed Data Processing

Abstract: Energy shortage is currently a serious problem in many developing countries. An energy-efficient 4-bit full adder that uses multiple FPGA families and the Xilinx Vivado software framework ...